From 2a78aa57d6640cc57d7736b732e5f654244f9d52 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20K=2E=20H=C3=BCttel?= Date: Wed, 25 Jan 2023 00:14:17 +0100 Subject: [PATCH] Re-enable merged-usr riscv builds MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Andreas K. Hüttel --- tools/catalyst-auto-qemu-riscv.conf | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/tools/catalyst-auto-qemu-riscv.conf b/tools/catalyst-auto-qemu-riscv.conf index 315f1720..2b0f985b 100644 --- a/tools/catalyst-auto-qemu-riscv.conf +++ b/tools/catalyst-auto-qemu-riscv.conf @@ -11,12 +11,14 @@ SPECS_DIR=${REPO_DIR}/releases/specs-qemu/riscv EMAIL_SUBJECT_PREPEND="[riscv-qemu-auto]" SETS=" - lp64d_musl + lp64d_systemd_mu lp64d_openrc lp64d_systemd - lp64_musl + lp64d_musl + lp64_systemd_mu lp64_openrc lp64_systemd + lp64_musl " SET_lp64d_musl_SPECS="stage1-lp64d-musl.spec stage3-lp64d-musl.spec"